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Duties & Responsibilities
Responsible for development ution of the physical design flow from RTL-to-GDS for in-house chip
Description
Tasks will include floor-planning, Place&Route, clock tree synthesis, Static Timing Analysis, power calculation, IR drop analysis, cross-talk, ECO, physical verification (LVS/DRC).
Detailed skills required
Strong working knowledge of Synopsys/Cadence/Magam Place & Route, Synopsys Primetime, along with experience in RC extraction tools. Strong tcl Perl scripting.
The person should have good communication skills be able to work effectively in a fast-paced, dynamic, team environment.
B.S.E.E. or equivalent minimum of 5 years of relevant work experience are required.
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Job Description
Developing or adapting hardware device driver
Developing or adapting embedded application software for Video Codec
Implementing software on system-on-chip solution using a combination of C assembly programming languages
Tuning software for performance
Requirements
Experience in developing debugging embedded systems (ARC, ARM, MIPS, SPARC, ...),especially in a RTOS environment(ucos,uclinux, Vxworks)
Familiar with peripherals protocols, such as I2C,UART,USB,LCD,Ethernet,IDE,SD,TCP/IP,RTP
Good knowledge of Video CODEC stard principle, (eg: MPEG-1/2/4, H.264), hs-on experience on video encode/decode as well as video applications(HDTV, DVB, streaming media, HD-DVD, PVR/VOD, networked camera, video conferencing, /or record-able media) is desirable.
Good at English, team player, positive personality, able to work under pressure to meet deadlines
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